Rambus Inc.
High-resolution digitally controlled delay line

Abstract:

In a delay control circuit having a plurality of series-coupled delay stages, an input signal is routed through one of the series-coupled delay stages via a first delay element if a first delay control value is in a first state, the first delay element imposing a first signal propagation delay according to a first bias signal. If the delay control value is in a second state, the input signal is routed through the one of the series-coupled delay stages via a second delay element instead of the first delay element, the second delay element imposing a second signal propagation delay according to a second bias signal. The first and second bias signals are calibrated such that the second signal propagation delay exceeds the first propagation delay by a predetermined time interval that is substantially briefer than the first signal propagation delay.