Sanmina Corporation
Simultaneous and selective wide gap partitioning of via structures using plating resist
Last updated:
Abstract:
A multilayer printed circuit board is provided having a first conductive layer and a first plating resist selectively positioned within the first conductive layer. A second plating resist may be selectively positioned within a second conductive layer. A through hole extends through the first plating resist in the first conductive layer and the second plating resist in the second conductive layer. An interior surface of the through hole is plated with a conductive material except along a length between the first plating resist and the second plating resist. This forms a partitioned plated through hole having a first via segment electrically isolated from a second via segment.
Status:
Grant
Type:
Utility
Filling date:
26 Oct 2020
Issue date:
12 Apr 2022