SiTime Corporation
MEMS cavity with non-contaminating seal
Last updated:
Abstract:
A semiconductor device includes a first silicon layer disposed between second and third silicon layers and separated therefrom by respective first and second oxide layers. A cavity within the first silicon layer is bounded by interior surfaces of the second and third silicon layers, and a passageway extends through the second silicon layer to enable material removal from within the semiconductor device to form the cavity. A metal feature is disposed within the passageway to hermetically seal the cavity.
Status:
Grant
Type:
Utility
Filling date:
21 May 2020
Issue date:
11 Jan 2022