Silicon Laboratories Inc.
Detection and management of frequency errors in a reference input clock signal

Last updated:

Abstract:

A method for generating a clock signal includes selecting a primary reference clock signal or a secondary reference clock signal as a reference clock signal for a phase-locked loop configured to generate an output clock signal. The method includes generating an indication of whether a failure of the reference clock signal has occurred by monitoring the secondary reference clock signal and a plurality of additional clock signals using the reference clock signal. The failure is determined based on whether a gross failure of the reference clock signal has occurred and if the gross failure has not occurred, further based on whether a quality failure of the reference clock signal has occurred.

Status:
Grant
Type:

Utility

Filling date:

24 Dec 2019

Issue date:

2 Feb 2021