Silicon Laboratories Inc.
Capacitive level shifter

Abstract:

A level shifter includes a flying capacitor having a first plate and a second plate. The level shifter includes a circuit coupled to the first plate and coupled to the second plate. The circuit is configured to receive a received signal having a logic state using a first voltage domain and configured to generate a symmetrical output signal having the logic state using a second voltage domain based on charge stored by the flying capacitor. The level shifter has a propagation delay from the received signal to the symmetrical output signal of less than one nanosecond with negligible duty cycle distortion.