Silicon Laboratories Inc.
Apparatus for Asynchronous Latch with Improved Performance and Associated Methods

Abstract:

An apparatus includes an asynchronous D-latch. The asynchronous D-latch includes a first inverter and a second inverter coupled in an anti-parallel fashion. The asynchronous D-latch further includes a third inverter coupled to provide a complement of a data (D) input signal of the asynchronous D-latch to the first and second inverters. The asynchronous D-latch further includes a meta-stability filter coupled to the first and second inverters.