Silicon Laboratories Inc.
Dual Processor Power Saving Architecture Communications System

Last updated:

Abstract:

A communications system has a low power connectivity processor and a high performance applications processor. The low power connectivity processor is coupled to a low power front end for wireless packets and the high performance applications processor is coupled to a high performance front end. A power controller is coupled to the low power front end and enables the applications processor and high performance front end when wireless packets which require greater processing capacity are received, and removes power from the applications processor and high performance front end at other times.

Status:
Grant
Type:

Utility

Filling date:

29 Aug 2020

Issue date:

11 Mar 2021