Silicon Laboratories Inc.
AC-Coupled Chopper Signal for a High-Impedance Buffer

Last updated:

Abstract:

A technique for receiving a DC or low frequency input signal using a chopper-stabilized amplifier includes chopping an input signal using a chopper clock signal to generate a chopped input signal. The input signal has a first voltage range and the chopper clock signal has a second voltage range. The chopper clock signal has peak-to-peak voltage over a period of the chopper clock signal. The peak-to-peak voltage is less than the first voltage range and is less than the second voltage range. A frequency of the input signal is at least an order of magnitude less than a frequency of the chopper clock signal. The second voltage range may be greater than or equal to the first voltage range. The technique may include generating a bias signal based on a voltage reference signal and an output signal having the first voltage range.

Status:
Grant
Type:

Utility

Filling date:

24 Sep 2018

Issue date:

26 Mar 2020