Semtech Corporation
Passive dynamic biasing for MOSFET cascode

Abstract:

A driver circuit has a plurality of transistors in a cascode arrangement. A passive biasing circuit is coupled to a gate terminal of a first transistor of the plurality of transistors. The passive biasing circuit has a first resistor coupled to a circuit node to provide a first biasing signal, a first capacitor coupled between the circuit node and a power supply conductor, a second resistor coupled between the circuit node and a drain terminal of the first transistor, and a third resistor coupled between the circuit node and a source terminal of the first transistor. A second transistor has a gate terminal coupled for receiving a data signal which controls an optical device.