Synopsys, Inc.
Combinatorial and sequential logic compaction in electronic circuit design emulation

Abstract:

An emulation host system can configure a reprogrammable hardware emulation system to emulate an electronic circuit design. The emulation host system can analyze the electronic circuit design for electronic circuits that are repetitive. The emulation host system can partition the electronic circuits onto a single partition. The emulation host system can map the single partition onto a single programmable logic element (PLE) of the reprogrammable hardware emulation system. The emulation host system can configure the reprogrammable hardware emulation system to emulate the electronic circuits using the single PLE.