Synopsys, Inc.
GLOBAL MISTRACKING ANALYSIS IN INTEGRATED CIRCUIT DESIGN
Last updated:
Abstract:
For each circuit element in a pair of launch and capture paths, a parameter value of the circuit element may be modified by a variation amount that is assigned to a class of circuit elements to which the circuit element belongs. Next, a timing slack may be computed for the pair of launch and capture paths.
Status:
Application
Type:
Utility
Filling date:
5 Aug 2021
Issue date:
17 Feb 2022