Synopsys, Inc.
COMMON MODE LOGIC BASED QUADRATURE COUPLED INJECTION LOCKED FREQUENCY DIVIDER WITH INTERNAL POWER-SUPPLY JITTER COMPENSATION

Abstract:

A circuit includes a clock generator, a frequency divider, and a first biasing circuit. The clock generator generates a clock signal of a first frequency. The frequency divider includes a first pair of cross coupled transistors. The frequency divider produces the clock signal of a second frequency. The first biasing circuit is coupled with the first pair of cross coupled transistors of the frequency divider. The first biasing circuit is adapted to enable a change in a transconductance of the first pair of cross coupled transistors to stabilize a phase angle between the clock signal at the first frequency and the clock signal at the second frequency.