Synopsys, Inc.
Machine-learning enhanced compiler

Last updated:

Abstract:

A method includes generating a netlist for a circuit design and predicting, by applying a first machine learning model to the netlist, a first compile time for the circuit design. The method also includes predicting, by applying a second machine learning model to the netlist, a first place and route strategy based on the first compile time. The method further includes adjusting a logic of the circuit design in accordance with the first place and route strategy.

Status:
Grant
Type:

Utility

Filling date:

13 Aug 2020

Issue date:

21 Jun 2022