Synopsys, Inc.
Methodology To Create Constraints And Leverage Formal Coverage Analyzer To Achieve Faster Code Coverage Closure For An Electronic Structure

Abstract:

An efficient unreachability analysis tool utilizes toggle coverage report data to automatically generate constraints associated with viable constant signals (e.g., constant inputs, one-time programmable and constant registers) utilized in a circuit design before performing a full unreachability analysis process, thereby improving the functioning of the computer/processor executing the unreachability analysis process by identifying low-activity registers and constraining them before the unreachability analysis process is performed, thereby substantially reducing the number of process steps required to identify dead code (unreachable signal/register targets). Constant inputs are identified using the toggle coverage report and used to generate corresponding constraints, and an initial unreachability analysis process is performed using only toggle coverage properties, then the full unreachability analysis process is performed for all (i.e., line, conditional, state/FSM and toggle) coverage properties using the constant input constraints. Constraints are also generated for one-time programmable and constant registers (OTP/C) before performing the full unreachability analysis process.