Synopsys, Inc.
Transparent hierarchical routing in an integrated circuit design

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Abstract:

Systems and techniques are described for transparent hierarchical routing in an integrated circuit (IC) design. A logical netlist can be analyzed in the IC design to identify endpoints of a physical route that crosses at least one physical hierarchy boundary. Next, a set of routing shapes can be created to electrically connect the endpoints of the physical route. The set of routing shapes can then be transformed to corresponding routing shapes in each physical hierarchy context along the physical route.

Status:
Grant
Type:

Utility

Filling date:

29 Mar 2019

Issue date:

27 Oct 2020