Synopsys, Inc.
Read-write architecture for low voltage SRAMs
Last updated:
Abstract:
An SRAM cell in a bit interleaved memory architecture with two phase sequential write scheme to achieve 100% write ability and the SNM target with bit interleaved architecture in SRAM.
Status:
Grant
Type:
Utility
Filling date:
2 Jul 2018
Issue date:
29 Sep 2020