Synopsys, Inc.
Non-volatile memory with single ended read scheme using distributed common mode feedback

Last updated:

Abstract:

A non-volatile memory system includes an array of bit cells arranged in rows and columns and configured to store bits of data, a reference bit cell, a plurality of bit lines connectable to the bit cells in the array and connecting to the reference bit cell, and a bit line controller. The bit line controller comprises a plurality of sense amps connected to the bit cells by the bit lines. The bit line controller determines the contents of the bit cells based on times t.sub.cell compared to a time t.sub.ref, where t.sub.cell is the time required for a current I.sub.cell generated by one of the bit cells to raise a voltage V.sub.sense of one of the sense amps by an amount .DELTA.V, and t.sub.ref is the time required for a current I.sub.ref generated by the reference bit cell to raise the voltage V.sub.sense of another one of the sense amps by the same .DELTA.V. .DELTA.V increases monotonically as a function of I.sub.ref.

Status:
Grant
Type:

Utility

Filling date:

12 Jul 2018

Issue date:

28 Jan 2020