Sony Group Corporation
Memory command that specifies one of multiple possible write data values where the write data is not transported over a memory data bus
Last updated:
Abstract:
An apparatus is described. The apparatus includes a memory controller having an interface to communicate with a memory. The memory controller comprising logic circuitry to specify one of multiple possible write values to the memory during a write operation with multiple bits of a command that is sent on a command address bus that emanates from the interface. The memory to write any one of the possible write values into its storage cells while the memory interface is in a power saving state wherein the specified one write value is not articulated by the memory controller on a data bus of the interface as part of the write operation.
Status:
Grant
Type:
Utility
Filling date:
31 Jan 2019
Issue date:
18 Jan 2022