Synaptics Incorporated
STACKED WAFER INTEGRATED CIRCUIT

Abstract:

A method for manufacturing a stacked wafer integrated circuit (IC) device. The method is performed by fabricating first circuitry on a top surface of a first IC wafer and depositing one or more electrical insulators, between the first circuitry, through a depth of the first IC wafer such that the one or more electrical insulators are not exposed on a bottom surface of the first IC wafer. Layers of semiconductor substrate are subsequently removed from a bottom surface of the first IC wafer until the one or more electrical insulators become exposed on the bottom surface of the first IC wafer.