Taiwan Semiconductor Manufacturing Company Limited
SEMICONDUCTOR ARRANGEMENT AND METHOD OF MANUFACTURE

Last updated:

Abstract:

A method for forming a semiconductor arrangement comprises forming a first fin in a semiconductor layer. A first gate dielectric layer includes a first high-k material is formed over the first fin. A first sacrificial gate electrode is formed over the first fin. A dielectric layer is formed adjacent the first sacrificial gate electrode and over the first fin. The first sacrificial gate electrode is removed to define a first gate cavity in the dielectric layer. A second gate dielectric layer including a second dielectric material different than the first high-k material is formed over the first gate dielectric layer in the first gate cavity. A first gate electrode is formed in the first gate cavity over the second gate dielectric layer.

Status:
Application
Type:

Utility

Filling date:

31 May 2021

Issue date:

16 Sep 2021