Taiwan Semiconductor Manufacturing Company Limited
Self-aligned dielectric spacer for magnetic tunnel junction patterning and methods for forming the same

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Abstract:

Pillar stacks of a top electrode and a hard mask portion are formed over a layer stack containing a continuous reference magnetization layer, a continuous nonmagnetic tunnel barrier layer, and a continuous free magnetization layer. A continuous dielectric liner may be deposited and anisotropically etched to form inner dielectric spacers. The continuous free magnetization layer, the continuous nonmagnetic tunnel barrier layer, and the continuous reference magnetization layer may be anisotropically etched to form vertical stacks of a respective reference magnetization layer, a respective nonmagnetic tunnel barrier layer, and a respective free magnetization layer, which are magnetic tunnel junctions. The inner dielectric spacers prevent redeposition of a metallic material of the hard mask portions on sidewalls of the magnetic tunnel junctions. The hard mask portions may be removed, and a metallic cell contact structures may be formed on top of each top electrode.

Status:
Grant
Type:

Utility

Filling date:

28 May 2020

Issue date:

29 Mar 2022