Taiwan Semiconductor Manufacturing Company Limited
Semiconductor arrangement comprising buffer layer and semiconductor columns over the buffer layer and formation thereof

Last updated:

Abstract:

A semiconductor arrangement and methods of formation are provided. A semiconductor arrangement includes a semiconductor column on a buffer layer over a substrate. The buffer layer comprises a conductive material. Both a first end of the semiconductor column and a bottom contact are connected to a buffer layer such that the first end of the semiconductor column and the bottom contact are connected to one another through the buffer layer, which reduces a contact resistance between the semiconductor column and the bottom contact. A second end of the semiconductor column is connected to a top contact. In some embodiments, the first end of the semiconductor column corresponds to a source or drain of a transistor and the second end corresponds to the drain or source of the transistor.

Status:
Grant
Type:

Utility

Filling date:

3 Nov 2016

Issue date:

17 May 2022