Taiwan Semiconductor Manufacturing Company Limited
Electrical component testing in stacked semiconductor arrangement

Last updated:

Abstract:

A stacked semiconductor arrangement is provided. The stacked semiconductor arrangement includes a dynamic pattern generator layer having an electrical component. The arrangement also includes a monitoring layer configured to evaluate electrical performance of the electrical component.

Status:
Grant
Type:

Utility

Filling date:

17 Nov 2016

Issue date:

5 Jan 2021