Taiwan Semiconductor Manufacturing Company Limited
Write assist for a memory device and methods of forming the same
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Abstract:
A semiconductor memory device includes an array of memory cells arranged in a plurality of rows and columns, with each memory cell including a plurality of bit cell transistors. The semiconductor memory device further includes a plurality of write assist circuits, including one or more write assist circuits within each column of the array of memory cells, each write assist circuit configured to provide a core voltage to memory cells within the same column and to reduce the core voltage during a write operation. The array of memory cells and the plurality of write assist circuits have a common semiconductor layout.
Status:
Grant
Type:
Utility
Filling date:
10 Jun 2019
Issue date:
7 Jan 2020