Texas Instruments Incorporated
SINGLE-CLOCK DISPLAY DRIVER

Abstract:

Aspects of the description provide for a circuit. In at least some examples, the circuit includes a driver. The driver includes a phase-locked loop and a digital interface. The phase-locked loop is configured to receive a clock signal and provide a second clock signal based on the first clock signal. The digital interface is configured to, receive the first clock signal, receive and sample data from a data frame at sequential rising edge transitions and falling edge transitions of the first clock signal, extract a portion of the data frame addressed to the driver from the data frame, and provide a portion of the data frame remaining after extracting the portion of the data frame addressed to the driver.