Texas Instruments Incorporated
PACKAGED SEMICONDUCTOR DEVICE WITH ELECTROPLATED PILLARS
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Abstract:
In a described example, a device includes an overcoat layer covering an interconnect; an opening in the overcoat layer exposing a portion of a surface of the interconnect; a stud on the exposed portion of the surface of the interconnect in the opening; a surface of the stud approximately coplanar with a surface of the overcoat layer; and a conductive pillar covering the stud and covering a portion of the overcoat layer surrounding the stud, the conductive pillar having a planar and un-dished surface facing away from the stud and the overcoat layer.
Status:
Application
Type:
Utility
Filling date:
17 Aug 2021
Issue date:
2 Dec 2021