Texas Instruments Incorporated
Methods and systems for generation of balanced secondary clocks from root clock

Last updated:

Abstract:

A system for generating secondary clock signals from a primary clock signal includes a dithered clock divider which has a first input adapted to receive the primary clock signal and a second input adapted to receive a random division ratio. The dithered clock divider provides a dithered clock signal. The system includes a multi-phase clock generator which has a first input adapted to receive the primary clock signal, a second input adapted to receive the dithered clock signal, and a third input adapted to receive a pseudo-random pattern. The multi-phase clock generator provides the secondary clock signals from multiple phases of the dithered clock signal. The system includes a pseudo-random pattern generator which provides the pseudo-random pattern.

Status:
Grant
Type:

Utility

Filling date:

29 Sep 2021

Issue date:

23 Aug 2022