Xilinx, Inc.
On-chip memory block circuit
Last updated:
Abstract:
A memory block circuit can include a plurality of data interfaces, a switch connected to each data interface of the plurality of data interfaces, and a plurality of memory banks each coupled to the switch. Each memory bank can include a memory controller and a random access memory connected to the memory controller. The memory block circuit also includes a control interface and a management controller connected to the control interface and each memory bank of the plurality of memory banks. Each memory bank can be independently controlled by the management controller.
Status:
Grant
Type:
Utility
Filling date:
21 Aug 2019
Issue date:
23 Nov 2021