Xilinx, Inc.
On-chip memory access pattern detection for power and resource reduction
Last updated:
Abstract:
Determining on-chip memory access patterns can include modifying a circuit design to include a profiler circuit for a random-access memory (RAM) of the circuit design, wherein the profiler circuit is configured to monitor an address bus of the RAM, and modifying the circuit design to include a debug circuit connected to the profiler circuit. Usage data for the RAM can be generated by detecting, using the profiler circuit, addresses of the RAM accessed during a test of the circuit design, as implemented in an integrated circuit. The usage data for the RAM can be output using the debug circuit.
Status:
Grant
Type:
Utility
Filling date:
5 Jan 2021
Issue date:
30 Nov 2021