Xilinx, Inc.
System and method for device synchronization
Last updated:
Abstract:
A system includes a synchronizer circuit configured to monitor a first bus coupled between a memory and a first device to determine an occupancy threshold of the memory based on one or more write requests from the first device. The synchronizer circuit monitors a second bus between the memory and a second device to receive a first read transaction of a read request from the second device. The synchronizer circuit determines that the first read transaction is allowed to be sent to the memory based on the occupancy threshold of the memory. In response to the determination, the first read transaction is sent to the memory.
Status:
Grant
Type:
Utility
Filling date:
14 May 2019
Issue date:
14 Dec 2021