Apple Inc.
Reconfigurable clock flipping scheme for duty cycle measurement

Last updated:

Abstract:

A clock test system included in a computer system includes a clock generator circuit that generates multiple clock signals. A switch circuit selects different ones of the multiple clock signals during different time periods to generate an output clock signal. A measurement circuit measures a duty cycle of the output clock signals during the different time periods to generate multiple duty cycle measures. The measurement circuit uses the multiple duty cycle measurements to cancel a portion of duty cycle distortion in the output clock signal to determine an adjusted duty cycle value.

Status:
Grant
Type:

Utility

Filling date:

24 Sep 2020

Issue date:

10 Aug 2021