Apple Inc.
Test-response comparison circuit and scan data transfer scheme in a DFT architecture for micro LED based display panels

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Abstract:

Design-for-test (DFT) architectures, and methods of testing an array of chips, which may be identical, are described. In an embodiment, a comparison circuit includes a plurality of comparators to compare scan-data out (SDO) data streams with an expected data stream and transmit a compared data stream that is indicated of whether or not an error exists in any of the SDO data streams.

Status:
Grant
Type:

Utility

Filling date:

21 Feb 2019

Issue date:

12 Jan 2021