Apple Inc.
Sub-patch techniques for graphics tessellation

Abstract:

Techniques are disclosed relating to tessellation of graphics patches. In some embodiments, tessellation circuitry is configured to divide patches into sub-patches for further independent processing. This may improve performance and/or reduce power consumption, in various embodiments. In some embodiments, the tessellation circuitry is first configured to divide an inner portion of the patch into a predetermined number of quad-shaped regions (e.g., three for triangle patches and four for quad patches). In some embodiments, the tessellation circuitry is configured to divide one or more of the regions into a number of sub-patches such that a value indicative of a number of vertices in each sub-patch is below a threshold value.