Apple Inc.
Hybrid pulse/two-stage data latch
Last updated:
Abstract:
An apparatus includes a control circuit configured to selectively activate, based on an operating mode signal, either a local clock signal or a pulse signal. The apparatus further includes a data storage circuit that is coupled to a data signal, the local clock signal, and the pulse signal. The data storage circuit may be configured to sample the data signal using the local clock signal during a first operating mode, and to sample the data signal using the pulse signal during a second operating mode.
Status:
Grant
Type:
Utility
Filling date:
10 Aug 2020
Issue date:
16 Aug 2022