Atomera Incorporated
Semiconductor device including enhanced contact structures having a superlattice

Abstract:

A semiconductor device may include a semiconductor substrate having a trench therein, and a superlattice liner at least partially covering bottom and sidewall portions of the trench. The superlattice liner may include a plurality of stacked groups of layers, with each group of layers including a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The semiconductor device may further include a semiconductor cap layer on the superlattice liner and having a dopant constrained therein by the superlattice liner, and a conductive body within the trench.