Atomera Incorporated
Patents, Design & Utilities

Last updated:

List of all Atomera Incorporated patents 86 in total

Status Patent
Application
Utility: METHODS FOR MAKING RADIO FREQUENCY (RF) SEMICONDUCTOR DEVICES INCLUDING A GROUND PLANE LAYER HAVING A SUPERLATTICE External link
Filling date: 6 Sep 2025 Issue date: 8 Sep 2022
Application
Utility: RADIO FREQUENCY (RF) SEMICONDUCTOR DEVICES INCLUDING A GROUND PLANE LAYER HAVING A SUPERLATTICE External link
Filling date: 6 Sep 2025 Issue date: 8 Sep 2022
Grant
Utility: Bipolar junction transistors including emitter-base and base-collector superlattices External link
Filling date: 6 Sep 2025 Issue date: 6 Sep 2022
Grant
Utility: Methods for making bipolar junction transistors including emitter-base and base-collector superlattices External link
Filling date: 6 Sep 2025 Issue date: 6 Sep 2022
Grant
Utility: Method for making superlattice structures with reduced defect densities External link
Filling date: 6 Sep 2025 Issue date: 30 Aug 2022
Application
Utility: SEMICONDUCTOR DEVICE INCLUDING A SUPERLATTICE AND AN ASYMMETRIC CHANNEL AND RELATED METHODS External link
Filling date: 6 Sep 2025 Issue date: 28 Jul 2022
Grant
Utility: Vertical semiconductor device with enhanced contact structure and associated methods External link
Filling date: 6 Sep 2025 Issue date: 12 Jul 2022
Grant
Utility: Method for making semiconductor device including vertically integrated optical and electronic devices and comprising a superlattice External link
Filling date: 6 Sep 2025 Issue date: 7 Jun 2022
Grant
Utility: Semiconductor device including a superlattice and an asymmetric channel and related methods External link
Filling date: 6 Sep 2025 Issue date: 10 May 2022
Grant
Utility: Method for making semiconductor device including a superlattice with different non-semiconductor material monolayers External link
Filling date: 6 Sep 2025 Issue date: 12 Apr 2022
Application
Utility: METHOD FOR MAKING A SEMICONDUCTOR DEVICE USING SUPERLATTICES WITH DIFFERENT NON-SEMICONDUCTOR THERMAL STABILITIES External link
Filling date: 6 Sep 2025 Issue date: 6 Jan 2022
Application
Utility: METHOD FOR MAKING SEMICONDUCTOR DEVICE INCLUDING SUPERLATTICE WITH OXYGEN AND CARBON MONOLAYERS External link
Filling date: 6 Sep 2025 Issue date: 6 Jan 2022
Application
Utility: SEMICONDUCTOR DEVICE INCLUDING SUPERLATTICE WITH OXYGEN AND CARBON MONOLAYERS External link
Filling date: 6 Sep 2025 Issue date: 6 Jan 2022
Application
Utility: METHOD FOR MAKING SEMICONDUCTOR DEVICE INCLUDING A SUPERLATTICE AND PROVIDING REDUCED GATE LEAKAGE External link
Filling date: 6 Sep 2025 Issue date: 16 Dec 2021
Application
Utility: SEMICONDUCTOR DEVICE INCLUDING A SUPERLATTICE AND PROVIDING REDUCED GATE LEAKAGE External link
Filling date: 6 Sep 2025 Issue date: 16 Dec 2021
Grant
Utility: Semiconductor devices including hyper-abrupt junction region including spaced-apart superlattices and related methods External link
Filling date: 6 Sep 2025 Issue date: 23 Nov 2021
Grant
Utility: Semiconductor device including a superlattice with different non-semiconductor material monolayers External link
Filling date: 6 Sep 2025 Issue date: 16 Nov 2021
Application
Utility: METHOD FOR MAKING SEMICONDUCTOR DEVICE INCLUDING A SUPERLATTICE WITH DIFFERENT NON-SEMICONDUCTOR MATERIAL MONOLAYERS External link
Filling date: 6 Sep 2025 Issue date: 26 Aug 2021
Application
Utility: SEMICONDUCTOR DEVICE INCLUDING A SUPERLATTICE WITH DIFFERENT NON-SEMICONDUCTOR MATERIAL MONOLAYERS External link
Filling date: 6 Sep 2025 Issue date: 26 Aug 2021
Grant
Utility: Method for making a semiconductor device including a superlattice and an asymmetric channel and related methods External link
Filling date: 6 Sep 2025 Issue date: 17 Aug 2021
Grant
Utility: Method for making a semiconductor device including a superlattice within a recessed etch External link
Filling date: 6 Sep 2025 Issue date: 27 Jul 2021
Application
Utility: BIPOLAR JUNCTION TRANSISTORS INCLUDING EMITTER-BASE AND BASE-COLLECTOR SUPERLATTICES External link
Filling date: 6 Sep 2025 Issue date: 15 Jul 2021
Application
Utility: METHODS FOR MAKING BIPOLAR JUNCTION TRANSISTORS INCLUDING EMITTER-BASE AND BASE-COLLECTOR SUPERLATTICES External link
Filling date: 6 Sep 2025 Issue date: 15 Jul 2021
Application
Utility: VERTICAL SEMICONDUCTOR DEVICE WITH ENHANCED CONTACT STRUCTURE AND ASSOCIATED METHODS External link
Filling date: 6 Sep 2025 Issue date: 11 Mar 2021
Grant
Utility: Method for making a varactor with a hyper-abrupt junction region including spaced-apart superlattices External link
Filling date: 6 Sep 2025 Issue date: 2 Mar 2021
Grant
Utility: Method for making semiconductor devices with hyper-abrupt junction region including spaced-apart superlattices External link
Filling date: 6 Sep 2025 Issue date: 2 Mar 2021
Application
Utility: METHOD FOR MAKING A VARACTOR WITH A HYPER-ABRUPT JUNCTION REGION INCLUDING SPACED-APART SUPERLATTICES External link
Filling date: 6 Sep 2025 Issue date: 21 Jan 2021
Application
Utility: METHOD FOR MAKING SEMICONDUCTOR DEVICES WITH HYPER-ABRUPT JUNCTION REGION INCLUDING SPACED-APART SUPERLATTICES External link
Filling date: 6 Sep 2025 Issue date: 21 Jan 2021
Application
Utility: SEMICONDUCTOR DEVICES INCLUDING HYPER-ABRUPT JUNCTION REGION INCLUDING SPACED-APART SUPERLATTICES AND RELATED METHODS External link
Filling date: 6 Sep 2025 Issue date: 21 Jan 2021
Application
Utility: METHOD FOR MAKING A SEMICONDUCTOR DEVICE HAVING A HYPER-ABRUPT JUNCTION REGION INCLUDING A SUPERLATTICE External link
Filling date: 6 Sep 2025 Issue date: 21 Jan 2021
Grant
Utility: Semiconductor device including vertically integrated optical and electronic devices and comprising a superlattice External link
Filling date: 6 Sep 2025 Issue date: 5 Jan 2021
Application
Utility: METHOD FOR MAKING SUPERLATTICE STRUCTURES WITH REDUCED DEFECT DENSITIES External link
Filling date: 6 Sep 2025 Issue date: 31 Dec 2020
Grant
Utility: Method for making a semiconductor device having a hyper-abrupt junction region including a superlattice External link
Filling date: 6 Sep 2025 Issue date: 29 Dec 2020
Grant
Utility: Method for making a semiconductor device including enhanced contact structures having a superlattice External link
Filling date: 6 Sep 2025 Issue date: 29 Dec 2020
Grant
Utility: Method for making a varactor with hyper-abrupt junction region including a superlattice External link
Filling date: 6 Sep 2025 Issue date: 15 Dec 2020
Grant
Utility: Method for making a FINFET including source and drain dopant diffusion blocking superlattices to reduce contact resistance External link
Filling date: 6 Sep 2025 Issue date: 1 Dec 2020
Grant
Utility: Semiconductor device including body contact dopant diffusion blocking superlattice having reduced contact resistance External link
Filling date: 6 Sep 2025 Issue date: 24 Nov 2020
Grant
Utility: Varactor with hyper-abrupt junction region including a superlattice External link
Filling date: 6 Sep 2025 Issue date: 17 Nov 2020
Grant
Utility: Method for making a FINFET having reduced contact resistance External link
Filling date: 6 Sep 2025 Issue date: 17 Nov 2020
Grant
Utility: Semiconductor device with metal-semiconductor contacts including oxygen insertion layer to constrain dopants and related methods External link
Filling date: 6 Sep 2025 Issue date: 17 Nov 2020
Grant
Utility: Method for making semiconductor device including body contact dopant diffusion blocking superlattice to reduce contact resistance External link
Filling date: 6 Sep 2025 Issue date: 17 Nov 2020
Grant
Utility: Varactor with hyper-abrupt junction region including spaced-apart superlattices External link
Filling date: 6 Sep 2025 Issue date: 3 Nov 2020
Grant
Utility: Semiconductor devices including hyper-abrupt junction region including a superlattice External link
Filling date: 6 Sep 2025 Issue date: 3 Nov 2020
Application
Utility: SEMICONDUCTOR DEVICE INCLUDING A SUPERLATTICE AND AN ASYMMETRIC CHANNEL AND RELATED METHODS External link
Filling date: 6 Sep 2025 Issue date: 29 Oct 2020
Application
Utility: METHOD FOR MAKING A SEMICONDUCTOR DEVICE INCLUDING A SUPERLATTICE AND AN ASYMMETRIC CHANNEL AND RELATED METHODS External link
Filling date: 6 Sep 2025 Issue date: 29 Oct 2020
Grant
Utility: Method for making semiconductor device including source/drain dopant diffusion blocking superlattices to reduce contact resistance External link
Filling date: 6 Sep 2025 Issue date: 27 Oct 2020
Grant
Utility: Method for making superlattice structures with reduced defect densities External link
Filling date: 6 Sep 2025 Issue date: 20 Oct 2020
Grant
Utility: Semiconductor device including enhanced contact structures having a superlattice External link
Filling date: 6 Sep 2025 Issue date: 15 Sep 2020
Grant
Utility: Inverted T channel field effect transistor (ITFET) including a superlattice External link
Filling date: 6 Sep 2025 Issue date: 1 Sep 2020
Grant
Utility: Method for making a semiconductor device including non-monocrystalline stringer adjacent a superlattice-sti interface External link
Filling date: 6 Sep 2025 Issue date: 11 Aug 2020

Showing 1 to 50 of 86 patents.