Atomera Incorporated
SEMICONDUCTOR DEVICE INCLUDING A SUPERLATTICE AND AN ASYMMETRIC CHANNEL AND RELATED METHODS

Last updated:

Abstract:

A semiconductor device may include a substrate and spaced apart first and second doped regions in the substrate. The first doped region may be larger than the second doped region to define an asymmetric channel therebetween. The semiconductor device may further include a superlattice extending between the first and second doped regions to constrain dopant therein. The superlattice may include a plurality of stacked groups of layers, with each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. A gate may overly the asymmetric channel.

Status:
Application
Type:

Utility

Filling date:

21 Apr 2020

Issue date:

29 Oct 2020