KLA Corporation
MULTI-LAYERED MOIRE TARGETS AND METHODS FOR USING THE SAME IN MEASURING MISREGISTRATION OF SEMICONDUCTOR DEVICES

Abstract:

A multi-layered moir target, useful in the calculation of misregistration between at least first, second and third layers being formed on a semiconductor device wafer, including at least one group of periodic structure stacks, each including a first stack, including a first stack first periodic structure (S1P1) having an S1P1 pitch along a first axis, a second stack, including a second stack first periodic structure (S2P1) having an S2P1 pitch along a second axis and a third stack, including a third stack first periodic structure (S3P1) having an S3P1 pitch along a third axis, the first axis being parallel to an x-axis or a y-axis, and at least one of the stacks including a second periodic structure having a second periodic structure pitch along at least one fourth axis parallel to the first axis and co-axial with one of the axes.