Synopsys
Patents, Design & Utilities
Last updated:
List of all Synopsys patents 579 in total
| Status | Patent |
|---|---|
Grant | Utility: 3D TCAD simulation Filling date: 6 Nov 2025 Issue date: 10 Sep 2019 |
Grant | Utility: Efficient analog layout prototyping by layout reuse with routing preservation Filling date: 6 Nov 2025 Issue date: 10 Sep 2019 |
Grant | Utility: Visual representation of circuit related data Filling date: 6 Nov 2025 Issue date: 10 Sep 2019 |
Application | Utility: MEMORY ARRAY ARCHITECTURES FOR MEMORY QUEUES Filling date: 6 Nov 2025 Issue date: 5 Sep 2019 |
Grant | Utility: Heterojunction field effect transistor device with serially connected enhancement mode and depletion mode gate regions Filling date: 6 Nov 2025 Issue date: 3 Sep 2019 |
Grant | Utility: First principles design automation tool Filling date: 6 Nov 2025 Issue date: 3 Sep 2019 |
Grant | Utility: One-time programmable bitcell with native anti-fuse Filling date: 6 Nov 2025 Issue date: 27 Aug 2019 |
Grant | Utility: Multiple patterning layout decomposition considering complex coloring rules Filling date: 6 Nov 2025 Issue date: 27 Aug 2019 |
Grant | Utility: Discretizing gate sizes during numerical synthesis Filling date: 6 Nov 2025 Issue date: 27 Aug 2019 |
Application | Utility: HYBRID EVOLUTIONARY ALGORITHM FOR TRIPLE-PATTERNING Filling date: 6 Nov 2025 Issue date: 22 Aug 2019 |
Application | Utility: Clock and Data Recovery (CDR) Circuit Filling date: 6 Nov 2025 Issue date: 22 Aug 2019 |
Grant | Utility: Logic timing and reliability repair for nanowire circuits Filling date: 6 Nov 2025 Issue date: 20 Aug 2019 |
Grant | Utility: Validating a clock tree delay Filling date: 6 Nov 2025 Issue date: 20 Aug 2019 |
Grant | Utility: System and method for managing and composing verification engines Filling date: 6 Nov 2025 Issue date: 20 Aug 2019 |
Grant | Utility: Method for modeling a photoresist profile Filling date: 6 Nov 2025 Issue date: 20 Aug 2019 |
Grant | Utility: Integrated circuit design using generation and instantiation of circuit stencils Filling date: 6 Nov 2025 Issue date: 13 Aug 2019 |
Grant | Utility: Enhancing memory yield and performance through utilizing nanowire self-heating Filling date: 6 Nov 2025 Issue date: 13 Aug 2019 |
Grant | Utility: Method and apparatus for emulation and prototyping with variable cycle speed Filling date: 6 Nov 2025 Issue date: 13 Aug 2019 |
Grant | Utility: Power-aware dynamic encoding Filling date: 6 Nov 2025 Issue date: 13 Aug 2019 |
Grant | Utility: Design-for-testability (DFT) insertion at register-transfer-level (RTL) Filling date: 6 Nov 2025 Issue date: 6 Aug 2019 |
Grant | Utility: Constructing fill shapes for double-patterning technology Filling date: 6 Nov 2025 Issue date: 6 Aug 2019 |
Grant | Utility: Optimizing constraint solving by rewriting at least one bit-slice constraint Filling date: 6 Nov 2025 Issue date: 6 Aug 2019 |
Grant | Utility: In-design real-time electrical impact verification flow Filling date: 6 Nov 2025 Issue date: 6 Aug 2019 |
Grant | Utility: Netlist abstraction for circuit design floorplanning Filling date: 6 Nov 2025 Issue date: 6 Aug 2019 |
Grant | Utility: Measurement of Aggressor/Victim capacitive coupling impact on timing Filling date: 6 Nov 2025 Issue date: 6 Aug 2019 |
Grant | Utility: Active trace assertion based verification system Filling date: 6 Nov 2025 Issue date: 6 Aug 2019 |
Grant | Utility: MTP-Thyristor memory cell circuits and methods of operation Filling date: 6 Nov 2025 Issue date: 30 Jul 2019 |
Grant | Utility: Compact OPC model generation using virtual data Filling date: 6 Nov 2025 Issue date: 30 Jul 2019 |
Grant | Utility: Formal verification result prediction Filling date: 6 Nov 2025 Issue date: 30 Jul 2019 |
Showing 550 to 579 of 579 patents.