Cadence Design Systems
Patents, Design & Utilities

Last updated:

List of all Cadence Design Systems patents 394 in total

Status Patent
Grant
Utility: Parallel Monte Carlo sampling for predicting tail performance of integrated circuits External link
Filling date: 19 Sep 2025 Issue date: 15 Sep 2020
Grant
Utility: Crosstalk cancellation in a receiver External link
Filling date: 19 Sep 2025 Issue date: 8 Sep 2020
Grant
Utility: Clock tree optimization by moving instances toward core route External link
Filling date: 19 Sep 2025 Issue date: 8 Sep 2020
Grant
Utility: System, method, and computer program product for debugging one or more observable failures in a formal verification External link
Filling date: 19 Sep 2025 Issue date: 8 Sep 2020
Grant
Utility: Caching error checking data for memory having inline storage configurations External link
Filling date: 19 Sep 2025 Issue date: 8 Sep 2020
Grant
Utility: Method, system, and computer program product for rearrangement of objects within an electronic design External link
Filling date: 19 Sep 2025 Issue date: 8 Sep 2020
Grant
Utility: System, method, and computer program product for connecting power supplies in a mixed signal design External link
Filling date: 19 Sep 2025 Issue date: 8 Sep 2020
Grant
Utility: Partitioning a large circuit model for signal electromigration analysis External link
Filling date: 19 Sep 2025 Issue date: 8 Sep 2020
Grant
Utility: Systems and methods for automatic formal metastability fault analysis in an electronic design External link
Filling date: 19 Sep 2025 Issue date: 8 Sep 2020
Grant
Utility: Methods, systems, and computer program product for implementing an electronic design with optimization maps External link
Filling date: 19 Sep 2025 Issue date: 1 Sep 2020
Grant
Utility: Method for optimally connecting scan segments in two-dimensional compression chains External link
Filling date: 19 Sep 2025 Issue date: 1 Sep 2020
Grant
Utility: System and method for routing in an integrated circuit design External link
Filling date: 19 Sep 2025 Issue date: 25 Aug 2020
Grant
Utility: System, method, and computer program product for genetic routing in an electronic circuit design External link
Filling date: 19 Sep 2025 Issue date: 18 Aug 2020
Grant
Utility: Test circuitry with annularly arranged compressor and decompressor elements External link
Filling date: 19 Sep 2025 Issue date: 18 Aug 2020
Grant
Utility: Route driven placement of fan-out clock drivers External link
Filling date: 19 Sep 2025 Issue date: 11 Aug 2020
Grant
Utility: Clock tree wirelength reduction based on a target offset in connected routes External link
Filling date: 19 Sep 2025 Issue date: 11 Aug 2020
Grant
Utility: Devices and methods for test point insertion coverage External link
Filling date: 19 Sep 2025 Issue date: 11 Aug 2020
Grant
Utility: Systems and methods for arc-based debugging in an electronic design External link
Filling date: 19 Sep 2025 Issue date: 4 Aug 2020
Grant
Utility: Method and system for generating a validation test External link
Filling date: 19 Sep 2025 Issue date: 4 Aug 2020
Grant
Utility: Generating width spacing patterns for multiple patterning processes using instances External link
Filling date: 19 Sep 2025 Issue date: 4 Aug 2020
Grant
Utility: Method, system, and computer program product for performing channel analyses for an electronic circuit design including a parallel interface External link
Filling date: 19 Sep 2025 Issue date: 28 Jul 2020
Grant
Utility: System and method for memory control having selectively distributed power-on processing External link
Filling date: 19 Sep 2025 Issue date: 21 Jul 2020
Grant
Utility: Circuit design routing using multi-panel track assignment External link
Filling date: 19 Sep 2025 Issue date: 7 Jul 2020
Grant
Utility: Devices and methods for balanced routing tree structures External link
Filling date: 19 Sep 2025 Issue date: 7 Jul 2020
Grant
Utility: Methods for layout driven synthesis of transmission line routes in integrated circuits External link
Filling date: 19 Sep 2025 Issue date: 7 Jul 2020
Grant
Utility: High-speed low VT drift receiver External link
Filling date: 19 Sep 2025 Issue date: 7 Jul 2020
Grant
Utility: Testing for memories during mission mode self-test External link
Filling date: 19 Sep 2025 Issue date: 7 Jul 2020
Grant
Utility: Testing for memory error correction code logic External link
Filling date: 19 Sep 2025 Issue date: 7 Jul 2020
Grant
Utility: System, method, and computer program product for over-constraint/deadcode detection in a formal verification External link
Filling date: 19 Sep 2025 Issue date: 7 Jul 2020
Grant
Utility: Graphical user interface for interactive macro-cell placement External link
Filling date: 19 Sep 2025 Issue date: 7 Jul 2020
Grant
Utility: Method and system for performing cross-validation for model-based layout recommendations External link
Filling date: 19 Sep 2025 Issue date: 30 Jun 2020
Grant
Utility: System, method and computer-accessible medium for automated identification of embedded physical memories using shared test bus access in intellectual property cores External link
Filling date: 19 Sep 2025 Issue date: 30 Jun 2020
Grant
Utility: Method and system for generating a validation test External link
Filling date: 19 Sep 2025 Issue date: 30 Jun 2020
Grant
Utility: Method and system for profiling performance of a system on chip External link
Filling date: 19 Sep 2025 Issue date: 30 Jun 2020
Grant
Utility: Process for analyzing printed circuit board and packaging manufacturing design rules External link
Filling date: 19 Sep 2025 Issue date: 23 Jun 2020
Grant
Utility: Circuit design routing based on parallel run length rules External link
Filling date: 19 Sep 2025 Issue date: 16 Jun 2020
Grant
Utility: System, method, and computer program product for displaying bump layout for manufacturing variations External link
Filling date: 19 Sep 2025 Issue date: 16 Jun 2020
Grant
Utility: Methods, systems, and computer program products for implementing an electronic design with physical simulation using layout artwork External link
Filling date: 19 Sep 2025 Issue date: 16 Jun 2020
Grant
Utility: Methods for performing Boolean operations on planar region boundaries defined by parametric curves External link
Filling date: 19 Sep 2025 Issue date: 9 Jun 2020
Grant
Utility: Methods, systems, and computer program product for binding and back annotating an electronic design with a schematic driven extracted view External link
Filling date: 19 Sep 2025 Issue date: 9 Jun 2020
Grant
Utility: Editing of layout designs for fixing DRC violations External link
Filling date: 19 Sep 2025 Issue date: 2 Jun 2020
Grant
Utility: Circuits and methods for reducing asymmetric aging effects of devices External link
Filling date: 19 Sep 2025 Issue date: 26 May 2020
Grant
Utility: Route generation and buffer placement for disjointed power domains in an integrated circuit External link
Filling date: 19 Sep 2025 Issue date: 19 May 2020
Grant
Utility: System and method for visualizing event sequences for expressions using both hardware and software state information External link
Filling date: 19 Sep 2025 Issue date: 12 May 2020
Application
Utility: METHOD AND APPARATUS FOR DETERMINING WAIVER APPLICABILITY CONDITIONS AND APPLYING THE CONDITIONS TO MULTIPLE ERRORS OR WARNINGS IN PHYSICAL VERIFICATION TOOLS External link
Filling date: 19 Sep 2025 Issue date: 7 May 2020
Grant
Utility: System and method to estimate a number of layers needed for routing a multi-die package External link
Filling date: 19 Sep 2025 Issue date: 5 May 2020
Grant
Utility: View pruning for routing tree optimization External link
Filling date: 19 Sep 2025 Issue date: 5 May 2020
Grant
Utility: Irregular sink arrangement for balanced routing tree structures External link
Filling date: 19 Sep 2025 Issue date: 5 May 2020
Grant
Utility: Multi-channel memory interface External link
Filling date: 19 Sep 2025 Issue date: 5 May 2020
Grant
Utility: Automatic design and verification of safety critical electronic systems External link
Filling date: 19 Sep 2025 Issue date: 5 May 2020

Showing 200 to 250 of 394 patents.